LMK03200ISQE/NOPB

Texas Instruments

Texas Instruments LMK03200ISQE/NOPB Clock Conditioner, 1:8 fanout, 1.296 GHz max, LVCMOS/LVDS/LVPECL input, LVDS/LVPECL output, 48-WQFN (7x7), -40 to 85°C.

Texas Instruments LMK03200ISQE/NOPB
Download datasheet (PDF)
[IN STOCK] In Stock: 113 pcs
$22.87/ pc

Volume pricing

Buy Now

MOQ 1 · Tape & Reel (TR); Cut Tape (CT) · RoHS · EIA-481 · DAP/DDP · T/T

Technical specifications

LMK03200ISQE/NOPB specifications
Parameter / AttributeSpecification / Value
TypeClock Conditioner
MountingSurface Mount
Supply voltage3.15V ~ 3.45V
Frequency - max1.296GHz
Operating temperature-40°C~85°C
PLLNo
InputLVCMOS, LVDS, LVPECL
OutputLVDS, LVPECL
PackageTape & Reel (TR); Cut Tape (CT)
Case48-WFQFN Exposed Pad
Divider (Multiplier)Yes/No
Number of circuits1
Ratio - Input:Output1:8
Differential - Input:OutputYes/Yes

Technical details

Clock conditioner with 1.296 GHz ceiling and 1:8 fanout

The Texas Instruments LMK03200ISQE/NOPB is a clock conditioner that accepts LVCMOS, LVDS, or LVPECL inputs and distributes up to eight LVDS or LVPECL outputs at a maximum frequency of 1.296 GHz. The 1:8 input-to-output ratio means a single reference clock can feed eight downstream devices — SERDES, FPGA transceivers, or data converters — without an external fanout buffer.

Signal interface and differential path

Both the input and output paths support differential signalling — the input accepts LVCMOS single-ended or LVDS/LVPECL differential, while the outputs drive LVDS or LVPECL loads directly. The differential input-to-output path (Yes/Yes) means the device preserves signal integrity through the conditioning stage; a single-ended input is converted internally before distribution. The integrated divider (Yes) allows the output frequency to be a sub-multiple of the input, useful when the system clock tree needs a lower-rate reference for a specific FPGA bank or ADC sampling clock.

LMK03200ISQE/NOPB
[ALLOC] verified
Quote