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Texas Instruments LMK00304SQE/NOPB — Clock & Timing ICs

TI LMK00304SQE/NOPB Fanout Buffer, 3.1 GHz, 32-WQFN

MPNLMK00304SQE/NOPB
Active

Texas Instruments LMK00304SQE/NOPB fanout buffer (distribution), multiplexer, translator, 3.1 GHz max, 3:5 I/O, CML/HCSL/HSTL/LVDS/LVPECL/SSTL/crystal input, HCSL/LVCMOS/LVDS/LVPECL output, 32-WQFN (5x5), active.

$8.8200Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

LMK00304SQE/NOPB specifications
ParameterValue
TypeFanout Buffer (Distribution), Multiplexer, Translator
MountingSurface Mount
Supply voltage3.15V ~ 3.45V
Frequency - max3.1 GHz
Operating temperature-40°C~85°C
InputCML, HCSL, HSTL, LVDS, LVPECL, SSTL, Crystal
OutputHCSL, LVCMOS, LVDS, LVPECL
PackageTape & Reel (TR); Cut Tape (CT)
Case32-WFQFN Exposed Pad
Number of circuits1
Ratio - Input:Output3:5
Differential - Input:OutputYes/Yes

Product details

3.1 GHz fanout buffer with protocol translation

The LMK00304SQE/NOPB is a Texas Instruments fanout buffer that also integrates a multiplexer and level translator in one 32-WQFN package. It accepts up to three input sources — CML, HCSL, HSTL, LVDS, LVPECL, SSTL, or a crystal — and distributes the selected clock to five outputs in HCSL, LVCMOS, LVDS, or LVPECL format. The 3.1 GHz maximum frequency covers PCIe Gen4/5 reference clocks, 100G Ethernet, and high-speed ADC/DAC sampling clocks. At this speed, the differential input-to-output path (Yes/Yes per the spec) preserves signal integrity without external level shifting.

The part operates from a 3.15V to 3.45V supply — a narrow rail typical of high-performance clocking ICs that need tight PLL/VCO noise margins.

Active lifecycle — no end-of-life risk

Because it is an active TI catalog part, it is sourced through authorized distribution channels.

Frequently asked questions

What input and output formats does the LMK00304SQE/NOPB support?

The input accepts CML, HCSL, HSTL, LVDS, LVPECL, SSTL, or a crystal. The output can be configured as HCSL, LVCMOS, LVDS, or LVPECL. This makes it a protocol-agnostic clock distribution point for mixed-signal boards.