What this low-side driver does and where it fits
Each of the two independent channels delivers a peak source current of 3 A and a peak sink current of 5 A, with typical rise and fall times of 14 ns and 12 ns respectively — fast enough to minimize switching losses in converters running from 3.5 V to 14 V supply rails. The inverting input logic (VIL at 0.8 V, VIH at 2.2 V) simplifies interface to PWM controllers that use active-low enable or complementary drive.
3 A source / 5 A sink — what it means for your FET selection
The asymmetry between source and sink current (3 A vs 5 A) is intentional: it pulls the gate down harder than it pushes up, which speeds turn-off relative to turn-on.
Active lifecycle and sourcing posture
No end-of-life notification or last-time-buy schedule is in effect.