80 MHz Cortex-M3 with Ethernet, CAN, USB OTG — what it means for a BOM line
It packs 384 KB of Flash and 96 KB of RAM, a pairing sized for protocol-stack-heavy applications like industrial Ethernet gateways or CAN-to-Ethernet bridges. The peripheral set — Ethernet MAC+PHY, CAN 2.0B, USB OTG, multiple UART/SPI/I²C, and a 16-channel 12-bit ADC — means a single chip can handle fieldbus, HMI, and backhaul connectivity without external controllers.
Obsolete — planning the last buy or sourcing surplus
That means Texas Instruments has ended production — no further factory orders are accepted. The 100-LQFP footprint is common across the Stellaris 9000 family, so a pin-compatible migration to a sibling with similar memory and peripheral map may be possible, but no official replacement order code is listed. Any incoming stock should be date-code traced and visually inspected — the laser etch on the 100-LQFP body is a clean authenticity marker against re-marked parts.
Memory and connectivity headroom for protocol stacks
384 KB of Flash and 96 KB of RAM give this MCU enough headroom to run a full TCP/IP stack alongside a CANopen or Modbus application, plus a USB device/host stack. The 80 MHz Cortex-M3 core delivers roughly 1.25 DMIPS/MHz, so sustained throughput for Ethernet packet processing at 100 Mbps is feasible with careful interrupt prioritization. The 16-channel 12-bit ADC at 1 MSps covers analog sensor acquisition — thermocouples, pressure transducers, current shunts — without an external ADC. Brown-out reset and POR are on-chip, reducing external supervisor IC count.