The LM3S9B92-IBZ80-C3T: Sourced here through independent distribution; each reel is lot-traceable and verified against TI's original marking. Availability and current pricing confirmed at RFQ.
Cortex-M3 at 80 MHz with 256 KB Flash
ARM Cortex-M3 core running at 80 MHz — the 32-bit single-core architecture delivers deterministic interrupt response and a 1.25 DMIPS/MHz instruction throughput, adequate for real-time control loops and protocol stacks. On-chip memory: 256 KB Flash (256K x 8) for firmware and 96 KB SRAM (96K x 8) for data. The 96 KB RAM leaves headroom for Ethernet buffering and multi-packet USB transfers without external memory.
Connectivity and peripheral set
Integrated Ethernet MAC+PHY, USB OTG, and CANbus — the part was designed for industrial gateways and embedded networking nodes that need a single-chip controller with wired interfaces. Additional peripherals: I²C, SPI, SSI, UART/USART, IrDA, LINbus, Microwire, QEI, plus DMA and a 16-channel 10-bit ADC. The 65 I/O lines are multiplexed across these functions.
Package and supply rail
108-ball LFBGA (10x10 mm) — the 0.80 mm ball pitch requires a 4-layer PCB for fan-out.