Texas Instruments has marked the LM3S5791-IQC80-C5 as Obsolete. For existing BOM lines, this part is sourced through independent distribution channels — quantities and pricing are confirmed per RFQ against available surplus or new-old-stock inventory.
ARM Cortex-M3 core at 80 MHz
Built around the ARM Cortex-M3 core, the LM3S5791-IQC80-C5 runs at 80 MHz — a 32-bit single-core architecture that delivers deterministic interrupt handling and a Thumb-2 instruction set for code density. The 80 MHz ceiling sets the throughput for control loops and protocol processing; the actual sustained performance depends on flash wait-state configuration and the peripheral bus load.
On-chip memory and peripheral set
Program memory is 128 KB of on-chip Flash, paired with 64 KB of SRAM — enough for a moderate application stack, a real-time operating system kernel, and communication buffers without external memory. The part integrates a 16-channel 10-bit ADC, a DMA controller, PWM modules, a watchdog timer, and brown-out detect/reset. Connectivity spans CAN, USB OTG, multiple UART/USART, SPI, I²C, IrDA, LIN, and a QEI for quadrature encoder inputs. The 72 general-purpose I/O lines are multiplexed with these peripherals.
Package and temperature grade
Housed in a 100-pin LQFP with a 14x14 mm body, surface-mount. The internal oscillator reduces external BOM count for clock generation.