Cortex-M3 core at 50 MHz — 128 KB flash, 20 KB SRAM
The LM3S1J11-IBZ50-C5: On-chip memory is 128 KB of flash and 20 KB of SRAM — enough for a moderate control stack with a small RTOS and application code. The 108-BGA package (10x10 mm body) brings out 67 GPIOs, plus dedicated pins for the internal oscillator, brown-out reset, DMA, PWM, and watchdog timer. Connectivity covers I²C, SPI, SSI, UART/USART, IrDA, LIN, and Microwire — a broad set for industrial sensor interfaces, motor-drive comms, or simple fieldbus gateways.
Texas Instruments has marked the LM3S1J11-IBZ50-C5 as obsolete. Date-code spread and packaging condition (sealed reels or trays) are confirmed at quote time.