Skip to main content
Texas Instruments LM393LVDSGR — Analog & Data Acquisition

TI LM393LVDSGR Comparator, 2-Element, Open-Drain, 8-WSON

MPNLM393LVDSGR
Active

Texas Instruments LM393 series, dual general-purpose comparator, LM393LVDSGR, 2-element, open-drain output, 8-WFDFN exposed pad package, 1.65V-5.5V supply, 600ns propagation delay, -40°C to 125°C.

$0.4300Ref. price · indicative, final on quote
Packaging8-WFDFN Exposed Pad
RoHSNot applicable
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

LM393LVDSGR specifications
ParameterValue
TypeGeneral Purpose
Output typeOpen-Drain
MountingSurface Mount
Voltage - input offset2mV @ 5V
Voltage - supply, single (Dual (±))1.65V ~ 5.5V
Output current100mA @ 5V
Current - quiescent35µA
Current - input bias5pA @ 5V
Operating temperature-40°C ~ 125°C
PackageTape & Reel (TR) Cut Tape (CT)
Case8-WFDFN Exposed Pad
CMRR, PSRR65dB, 80dB PSRR
Number of elements2
Propagation delay600ns

Product details

The LM393LVDSGR: Maximum quiescent current is 35 µA per device. For a battery-powered sensor node that wakes periodically to compare a thermistor or photodiode threshold, the comparator's own draw sits well below the microcontroller's sleep current — the system's idle power is dominated by the sensor bias, not the comparator.

Propagation delay and input bias — speed versus source impedance

600 ns maximum propagation delay sets the response ceiling for overcurrent or zero-crossing detection — at a 1 MHz clock rate the delay is less than one cycle, but at 10 MHz the comparator's output lags by six cycles, so it is best suited for sub-MHz threshold events rather than high-speed data recovery. Maximum input bias current is 5 pA at 5 V. With a 10 MΩ source impedance the voltage error is 50 µV — negligible for most window comparators, but a 100 MΩ piezoelectric sensor would see a 500 µV offset that shifts the threshold by half the input offset spec. The 2 mV maximum input offset voltage is the dominant error term for low-impedance sources.

Open-drain output and package — wired-OR and board area

Open-drain output lets multiple comparators share a common pull-up resistor for wired-OR logic — a single interrupt line from several over-temperature or over-current detectors collapses to one GPIO pin without external logic gates. The 8-WSON package (2x2 mm,) with exposed thermal pad fits into a 2-layer board where the pad is soldered to a ground-plane via array — the thermal resistance drops by roughly 40% compared to a non-pad SOIC, keeping the junction below 125°C even when sinking 100 mA from the output into a short circuit.

Temperature grade and noise rejection

An engine-bay ECU that sees 105°C on a summer day still has 20°C of margin before the absolute-maximum junction rating is reached. Typical CMRR is 65 dB and PSRR is 80 dB. At 65 dB CMRR, a 1 V common-mode shift at the input appears as a 560 µV offset at the output — well within the 2 mV input offset spec, so the threshold stays stable across ground shifts in a noisy backplane.