LM25101ASD-1/NOPB

Texas Instruments

Texas Instruments LM25101ASD-1/NOPB half-bridge gate driver, N-Channel MOSFET, 3A peak source/sink, 9V-14V supply, 100V bootstrap, 8-WSON (4x4) exposed pad, Tape & Reel or Cut Tape.

LM25101ASD-1-NOPB
Download datasheet (PDF)
[IN STOCK] In Stock: 4 pcs
$9.74/ pc

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MOQ 1 · Tape & Reel (TR); Cut Tape (CT) · RoHS · EIA-481 · DAP/DDP · T/T

Technical specifications

LM25101ASD-1/NOPB specifications
Parameter / AttributeSpecification / Value
Gate typeN-Channel MOSFET
Input typeNon-Inverting
Channel typeIndependent
MountingSurface Mount
Supply voltage9V ~ 14V
Logic voltage - VIL, VIH2.3V, -
High side voltage - max (Bootstrap)100 V
Current - peak output (Source, sink)3A, 3A
Operating temperature-40°C ~ 125°C (TJ)
PackageTape & Reel (TR); Cut Tape (CT)
Case8-WDFN Exposed Pad
Number of drivers2
Driven configurationHalf-Bridge
Rise (Fall time)430ns, 260ns

Technical details

Half-bridge driver for N-channel MOSFETs — 3 A peak and 100 V bootstrap ceiling

The LM25101ASD-1/NOPB is a half-bridge gate driver from Texas Instruments designed to drive two N-channel MOSFETs in an independent, non-inverting configuration. The 3 A peak source and 3 A peak sink current means it can charge and discharge the gate capacitance of medium-power MOSFETs quickly, which directly sets the switching transition time and the dead-time you need to budget in the PWM scheme. The bootstrap high-side supply is rated to 100 V maximum, so the driver supports bus voltages up to that ceiling. The 9 V to 14 V supply range is the bias rail for the low-side and the bootstrap charging circuit — it must stay within that window for the undervoltage lockout to release. Layout the decoupling capacitors close to the VDD and HB pins — the 3 A transient draw on each switching edge demands a low-inductance loop.

430 ns rise, 260 ns fall — typical timing and what it means for dead-time

The typical rise time is 430 ns and fall time is 260 ns driving the rated load. These are typical values, not maximums — the actual transition time depends on the total gate charge of the external MOSFET and the drive loop impedance. Budget dead-time in the controller firmware at least 2× the rise time to avoid shoot-through during the bootstrap refresh cycle. The 125°C junction limit means the thermal resistance of the exposed-pad solder joint to the board must be kept under ~40°C/W for a 3 A switching application at full bus voltage.

Active lifecycle and compliance — no EOL watch needed

For volume production, the reel quantity is the standard procurement unit; cut-tape samples are available for prototyping.

LM25101ASD-1/NOPB
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