Dual-channel capacitive isolator for 5 Mbps signal paths
It provides galvanic isolation up to 2500 Vrms across the isolation barrier, with both channels configured as inputs on Side 1 and outputs on Side 2.
The minimum common-mode transient immunity of 25 kV/µs means the output won't glitch when a fast voltage transient slams across the isolation barrier. This matters in motor drives, inverters, and switched-mode power supplies where the ground plane on one side jumps several hundred volts in a few nanoseconds. If your system sees high dV/dt events from IGBT or SiC switching edges, this part holds the data path clean.
Supply range and channel direction
Both channels face the same direction (2 inputs on Side 1, 0 on Side 2), so this is strictly a forward-path isolator — no reverse feedback channel. If you need a bidirectional or mixed-direction interface, the ISO7220 family includes other channel configurations.
Propagation delay and timing budget
Maximum propagation delay is 70 ns in either direction, with pulse-width distortion capped at 3 ns. For a 5 Mbps signal (200 ns bit period), 70 ns of delay consumes about 35% of the bit time — enough margin for most UART and low-speed SPI links, but check your setup/hold budget if you're running near the data rate ceiling. The 1 ns typical rise/fall edges keep the signal shape clean into a standard SOIC-8 layout.
No isolated power converter on-chip — you supply the secondary-side rail separately.
Listed as Active in the product lifecycle.