Four-channel LVDS reDriver for 800 Mbps signal conditioning
The Texas Instruments DS90LV804TSQX is a four-channel LVDS buffer and reDriver designed to regenerate and condition high-speed differential signals. It accepts CML, LVDS, or LVPECL input levels and outputs LVDS, making it a flexible signal-conditioning block for backplane, cable, or clock distribution applications where signal integrity degrades over distance. Each channel supports a maximum data rate of 800 Mbps, with a propagation delay of 2.0 ns and input capacitance of 3.5 pF.
For new designs or BOM lines requiring this exact order code, procurement must rely on independent distribution channels.
800 Mbps per channel — timing and signal-integrity budget
At 800 Mbps, the per-channel bit period is 1.25 ns. The 2.0 ns propagation delay is a fixed latency through the device, not a timing uncertainty — it adds to the total path delay but does not reduce the data eye. The real margin driver is the device's ability to re-drive the signal with LVDS levels, restoring edge rates and voltage swing after a lossy transmission line. For a backplane trace or cable run that has attenuated the original signal, this reDriver recovers the eye opening so the receiver sees a clean differential swing. The 3.5 pF input capacitance is low enough to avoid loading the upstream driver excessively at these rates.
Input flexibility and supply rail
The DS90LV804TSQX accepts three common differential signaling standards on its inputs: CML, LVDS, and LVPECL. The output is always LVDS, which is the standard for low-noise, high-speed point-to-point links. The supply range is 3.15 V to 3.45 V, so a nominal 3.3 V rail is within tolerance. The 117 mA supply current is the total for all four channels active; thermal design should account for this in the 32-WQFN package with the exposed pad soldered to a PCB copper plane.