Quad LVDS receiver for high-speed backplane and cable links
It integrates four independent receivers in a single 16-TSSOP package, accepting differential input signals and delivering single-ended CMOS outputs.
400 Mbps per channel — margin for the signal-integrity budget
Each of the four receivers handles a 400 Mbps data stream, which translates to a 200 MHz toggle rate on the output. That rate covers most parallel LVDS links running at 100–200 MHz clock speeds, leaving headroom for cable attenuation and connector losses. The receiver thresholds are LVDS-standard (typical ±100 mV differential), so the part works directly with any LVDS driver on the same bus. For a design targeting 200 Mbps per pair, the 400 Mbps rating gives a 2× margin against jitter and skew — useful when routing through a backplane or a long cable harness.
No external termination resistors are needed — the receiver includes on-chip 100 Ω differential termination, saving two resistors per channel on the BOM.
TI lists this part as Active. The ROHS3 compliance covers current global RoHS requirements, including the four phthalates.