TI has not issued a formal last-time-buy notice, but the NRND flag means this part is on the path to end-of-life. New designs should not commit to this buffer; existing production BOMs need a qualified replacement identified before a discontinuation notice arrives. The 8-pin SOIC footprint and LVDS-output function narrow the search to other single-channel LVDS reDrivers in the same package.
What the 1.4 ns delay and 800 Mbps rate mean for the link budget
The 1.4 ns propagation delay is the time the reDriver adds to the signal path. In a multi-drop backplane or a long cable run, this delay stacks with PCB trace delay and connector latency. At 800 Mbps the bit period is 1.25 ns, so the reDriver adds slightly more than one unit interval — a factor that must be accounted for in the timing closure of the serial link. The 47 mA supply current is the continuous draw; no power-save or shutdown mode is specified, so the part dissipates roughly 150 mW at 3.3 V and needs no special thermal management in the SOIC-8 package.
Input flexibility — CML, LVDS, or LVPECL to LVDS conversion
The DS90LV001TMX accepts three common differential signaling standards on its input: CML, LVDS, and LVPECL. This makes it a glue-logic translator for mixed-protocol backplanes where a serializer outputs CML and the downstream deserializer expects LVDS, or where an LVPECL clock distribution needs to drive an LVDS fanout buffer. The output is always LVDS, so the part functions as a protocol bridge and signal conditioner in one device.