The DS90LV001TLD: The part is built for point-to-point serial links where the PCB trace or cable run exceeds the drive capability of the source transceiver. Typical deployment is in backplane distribution, clock/data recovery fan-out, or extending LVDS links across a midplane or cable assembly in industrial or telecom equipment.
The 800 Mbps maximum data rate covers common serial standards such as 7:1 LVDS video, 100BASE-FX, and many camera-link or flat-panel interfaces. The 1.4 ns propagation delay matters when the buffer sits in a timing-critical path — it adds roughly one bit-period of latency at 700 Mbps, so the system must budget this into the setup-and-hold margin at the receiver. The single-channel topology means one device handles one differential pair; a multi-link backplane needs one DS90LV001 per lane. Supply current is 47 mA typical at 800 Mbps, which is modest for a signal-conditioning block but should be included in the rail budget for a dense multi-lane design.
This is the formal flag from Texas Instruments that the part remains available for existing production but should not be selected for a new board spin. For a new design, the correct move is to pick a current LVDS buffer/repeater — the DS90LV001 functional block is common across TI's LVDS portfolio, and the 8-WSON footprint is shared with several active siblings.