Supply voltage and signal integrity
The 3V to 3.6V supply range ties directly to the common 3.3V rail used across most digital systems. If your board already runs a 3.3V supply for the FPGA or SoC, this driver shares that rail without a separate regulator. The LVDS output swing is defined by the supply, so a clean, low-noise 3.3V plane directly improves the transmitted signal's eye opening — dirty supply shows up as jitter at the receiver.