18-bit precision with a 5 µs settling window
The DAC9881SBRGET is an 18-bit, single-channel, voltage-buffered DAC from Texas Instruments, built on an R-2R ladder architecture. Its 5 µs typical settling time means the output rail settles to within 1 LSB of the final value in that window — fast enough for closed-loop control loops that update at 100 kHz or below, but not for pixel-rate video or high-speed waveform generation.
What the linearity specs mean for your BOM
INL is specified at ±2 LSB max, DNL at ±0.75 LSB max. A DNL below ±1 LSB guarantees monotonicity — the output never steps backward as the digital code increments, which matters for servo positioning and precision voltage ramps where a non-monotonic step would cause a control reversal. The SPI/DSP-compatible serial interface operates up to 50 MHz, so a 24-bit frame (18 data bits plus control) transfers in under 500 ns, leaving the rest of the 5 µs settling budget for the output amplifier to slew.
Package and board-fit for a 24-VQFN
The package is rated MSL-3 (moisture sensitivity level) per JEDEC — standard for QFN packages. If the sealed bag has been opened and the floor life exceeded, a bake at 125 °C for 48 hours is required before reflow to prevent popcorning.