Eight voltage outputs from a single 16-pin TSSOP
The DAC6578SPW packs eight 10-bit voltage-output DACs into a 16-TSSOP package, each with its own buffered output that settles to 0.5 LSB in 12 µs typical. That is eight independent analog voltages from a single IC — useful for trimming, biasing, or setting thresholds across a multichannel system where a separate DAC per channel would eat board space and I²C addresses. The I²C interface keeps the digital side to two wires (SDA and SCL) plus the address pin, so routing to a microcontroller or FPGA is straightforward even on a tight PCB.
Active production and compliance paperwork
The 16-TSSOP body is 4.40 mm wide — a common footprint that fits a two-layer breakout if the analog and digital ground planes are split under the package.
String-array architecture and linearity
The architecture is a string DAC — a resistor-divider ladder with a unity-gain buffer on each output. This gives monotonicity by design and keeps the INL at ±0.06 LSB typical and DNL at ±0.03 LSB typical. For a 10-bit DAC, that means the output step error is well under one LSB across the full range. Reference type is external — the full-scale output voltage equals the reference voltage applied to the VREF pin. The reference input impedance is high, so a standard 2.5 V or 4.096 V reference IC drives it without a buffer. The DAC itself draws its analog supply from the same rail as the reference, so the reference accuracy sets the system accuracy.