8-channel density in a 16-pin TSSOP
The DAC128S085CIMT/NOPB packs eight 12-bit voltage-output DACs into a 16-TSSOP package, delivering multi-channel analog output density without the footprint of a larger QFN or SOIC. Each channel settles to within 1 LSB in 8.5 µs, making this part viable for applications like multi-axis motor control setpoints or multi-channel ATE bias generation where per-channel update rates in the 100 kHz range are adequate.
The SPI/DSP-compatible serial interface operates with standard 3-wire or 4-wire protocols. A 16-bit data word carries the channel address and the 12-bit code, so the host microcontroller or FPGA can update any single channel in one frame without rewriting the others.
INL/DNL and reference architecture
Integral nonlinearity is specified at ±2 LSB maximum, and differential nonlinearity at +0.15/-0.09 LSB. The DNL is guaranteed monotonic — a critical property for closed-loop control systems where a non-monotonic transfer function would cause the loop to reverse direction. The architecture is a string DAC with an external reference input. The reference voltage sets the full-scale output range; using a precision external reference like the REF5050 improves the absolute accuracy beyond what an internal reference could provide.
The tube delivery format means the part arrives in anti-static tubes, not tape-and-reel — a consideration for pick-and-place feeder setup if the line is optimized for reels.