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Texas Instruments CSD87333Q3DT

CSD87333Q3DT NexFET Dual N-Ch MOSFET, 30V 15A 8-VSON

MPNCSD87333Q3DT
End of Life

Texas Instruments NexFET™ series, CSD87333Q3DT, dual N-channel asymmetrical MOSFET, 30V Vdss, 15A continuous drain, 14.3mOhm Rds(on) at 4A/8V, 4.6nC gate charge, 8-VSON (3.3x3.3 mm) package, surface mount.

$1.6Ref. price · indicative, final on quote
Packaging8-PowerTDFN
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
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Specifications

CSD87333Q3DT Technical Specifications
ParameterValue
SeriesNexFET™
FET type2 N-Channel (Dual) Asymmetrical
Mounting typeSurface Mount
Drain to source voltage30V
Current - continuous drain (Id) @ 25°C15A
Power - max6W
Operating temperature125°C (TJ)
PackageTape & Reel (TR); Cut Tape (CT)
FET featureLogic Level Gate, 5V Drive
Case8-PowerTDFN
Vgs(th) (Max) @ id1.2V @ 250µA
Rds on (Max) @ id, vgs14.3mOhm @ 4A, 8V
Gate charge (Qg) (Max) @ vgs4.6nC @ 4.5V
Input capacitance (Ciss) (Max) @ vds662pF @ 15V

Product details

15 A in a 3.3x3.3 mm VSON — the current-density play

The CSD87333Q3DT: That current density — 15 A out of a 10.9 mm² footprint — is the headline: it lets a point-of-load converter or a battery-protection switch handle a 12 A load without moving to a larger DFN or a PowerPAK.

Conduction loss and gate-drive budget

Rds(on) is 14.3 mOhm max at 4 A with an 8 V gate drive — that is the operating point for a 12 V input POL. At 15 A the conduction loss is about 3.2 W, which sits inside the 6 W package limit but demands a solid thermal via pattern under the VSON exposed pad. The 4.6 nC gate charge at 4.5 V means a small gate-driver IC or a logic-level PWM output can switch it at several hundred kilohertz without a pre-driver stage.

ROHS3 compliant, no exemption expiry to watch.

Where it fits in the power train

Asymmetrical dual N-channel — the two FETs are not identical, which is typical for a synchronous buck where the control FET and sync FET have different Rds(on) and Qg targets. Use it in a 12 V to 1.x V POL, a battery OR-ing circuit, or a load switch where the 30 V Vdss gives headroom on a 12 V bus.

Frequently asked questions

What is the CSD87333Q3DT datasheet?

Engineers need the datasheet to verify electrical characteristics and pin assignments for design-in.

Where can I buy CSD87333Q3DT in stock?

Buyers need to check real-time inventory to avoid production delays.

How much does CSD87333Q3DT cost?

Pricing is critical for BOM cost estimation and sourcing decisions.

What is the equivalent of CSD87333Q3DT?

Designers and buyers need alternatives for second-sourcing or when the original is unavailable.

Is CSD87333Q3DT obsolete or active?

Lifecycle status determines long-term availability and risk of redesign.

What is the pinout of CSD87333Q3DT?

Correct pin mapping is essential for PCB layout and to avoid shorts.