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Texas Instruments CDCLVD2104RHDR — Clock & Timing ICs

CDCLVD2104RHDR – TI Clock Fanout Buffer, 1:4, 800 MHz

MPNCDCLVD2104RHDR
End of Life

Texas Instruments CDCLVD2104RHDR, Fanout Buffer (Distribution), 2 circuits, 1:4 input:output ratio, 800 MHz max frequency, LVDS output, 28-VFQFN exposed pad, -40°C to 85°C.

$9.32Ref. price · indicative, final on quote
Packaging28-VFQFN Exposed Pad
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
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  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
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Specifications

CDCLVD2104RHDR Technical Specifications
ParameterValue
TypeFanout Buffer (Distribution)
Mounting typeSurface Mount
Voltage2.375V ~ 2.625V
Frequency800 MHz
Operating temperature-40°C ~ 85°C
InputLVCMOS, LVDS, LVPECL
OutputLVDS
PackageTape & Reel (TR); Cut Tape (CT)
Case28-VFQFN Exposed Pad
Number of circuits2
Ratio - Input:Output1:4
Differential - Input:OutputYes/Yes

Product details

1:4 LVDS fanout at 800 MHz — two independent buffers

The CDCLVD2104RHDR is a dual 1:4 fanout buffer from Texas Instruments, each buffer distributing one input to four LVDS outputs at up to 800 MHz. It accepts LVCMOS, LVDS, or LVPECL inputs, which means you can feed it from a crystal oscillator, a PLL, or a serializer without level-shifting the signal path first. The differential input-to-output path is fully differential, preserving signal integrity across the fanout tree. This matters when you are splitting a high-speed clock to multiple ADCs, FPGAs, or SerDes transceivers and cannot afford added jitter from single-ended routing.

Supply rail and thermal — 2.5 V nominal, exposed-pad grounding

The supply range is 2.375 V to 2.625 V, so it runs cleanly off a 2.5 V rail. Operating temperature spans -40°C to 85°C, covering industrial and most communications-equipment environments. No AEC-Q100 rating is listed, so it is not qualified for automotive under-hood use.

Active production — no end-of-life concern

Sourced per RFQ against your BOM quantity.

Frequently asked questions

Can CDCLVD2104RHDR accept LVPECL input?

Yes, the input stage accepts LVCMOS, LVDS, and LVPECL levels. No external level translation is needed when driving it from a standard LVPECL source.

What is the closest functional alternative to CDCLVD2104RHDR?

The CDCLVP1204RGTR is a 2:4 fanout buffer with LVPECL outputs, also from TI. It accepts the same input types plus LVTTL, runs at 2 GHz max, and comes in a similar 28-VQFN package. The key difference is output logic family — LVDS vs LVPECL — so the choice depends on your downstream receiver requirements.