Active production — AEC-Q100 spread-spectrum clock fanout
The CDCE937QPWRQ1: It integrates a PLL with bypass mode and delivers a 1:7 LVCMOS fanout from either a crystal or LVCMOS reference, with a maximum output frequency of 230 MHz — enough to clock the main bus, memory interface, and peripheral domains from a single device. The spread-spectrum modulation spreads the clock energy across a wider frequency band, reducing peak EMI at the fundamental and its harmonics by several dB — a practical advantage when the PCB layout has to pass CISPR 25 radiated emissions without a metal shield can.
1.7 V to 1.9 V supply, 20-TSSOP package
Operating from a single 1.7 V to 1.9 V rail, the CDCE937QPWRQ1 sits on the low-voltage core supply common in automotive infotainment and ADAS processors — no separate 3.3 V clock rail is needed. All seven LVCMOS outputs are non-differential, and the part does not include a divider on the output side — the 1:7 fanout is a straight buffer with spread-spectrum modulation applied to the output clock tree.