Dual D-type with set/reset, 50 MHz ceiling
The CD74HCT74M is a dual positive-edge-triggered D-type flip-flop from the 74HCT family, each element carrying independent Set (Preset) and Reset inputs with complementary outputs. Clock frequency is rated to 50 MHz — the propagation delay of 35 ns at 4.5 V, 50 pF sets the timing margin for the downstream logic, not the toggle rate itself. Quiescent current is 4 µA typical; the output can source or sink 4 mA per pin, enough to drive a standard LS load or a low-power LED indicator without a buffer.
Housed in a 14-SOIC narrow-body package (0.154-inch width, 3.90 mm), the CD74HCT74M occupies the same land pattern as the industry-standard SOIC-14. The 1.27 mm pitch is layout-friendly — two-layer boards fan out the pins without vias. This covers engine-bay electronics, outdoor telecom cabinets, and any environment where the junction sees sustained heat. Input capacitance is 10 pF per pin, typical for the HCT process.
Active production, ROHS3, no cross-reference needed
That part runs on a lower supply rail and switches faster, but the CD74HCT74M's 5 V-only operation and wider temperature range (-55°C vs -40°C) make it the better fit for legacy 5 V buses and extreme-temperature racks.