Latch identity and board-fit
The CD74HC75M96 is a dual 2-bit D-type transparent latch from the 74HC CMOS logic family. Each of the two independent latches captures data on the D input while the enable is high and holds it when enable goes low — the differential outputs (Q and Q-bar) drive complementary signals into the next stage. The 10 ns propagation delay sets the data throughput ceiling at roughly 50 MHz in a typical 5 V system, though the actual toggle rate depends on the output load capacitance. The surface-mount body reflows with a standard lead-free profile; the -55°C to 125°C operating range covers industrial and extended-temperature environments.
Output drive and temperature envelope
Each output sources or sinks 5.2 mA (at Vcc = 4.5 V), enough to drive one or two standard CMOS loads or a low-power LED indicator. The full military temperature range (-55°C to 125°C) is unusual for a standard 74HC part — most siblings stop at 85°C. This grade suits the CD74HC75M96 for avionics, downhole instrumentation, or outdoor telecom where the ambient sees extremes.