Active production — still a current BOM line
The CD74HC112MT: ROHS3 compliant, so no exemption paperwork needed for European or California markets. The part ships without lead in the solder finish.
60 MHz toggle rate — what sets the speed ceiling
The CD74HC112MT is a dual JK flip-flop with a 60 MHz maximum clock frequency. That figure is the toggle-rate limit for the flip-flop itself; the actual usable speed in a design is governed by the propagation delay (30 ns typ at 6V, 50 pF load per) and the input capacitance (10 pF per). Negative-edge triggered with asynchronous set and reset inputs that override the clock. The complementary outputs give both Q and Q-bar without an external inverter.
2V to 6V supply — one part for 3.3V and 5V rails
Supply range is 2V to 6V, covering the two most common logic-voltage families in a single BOM line. The 74HC family operates from the same rail as the rest of the HC logic on the board, so no separate level translator is needed between the flip-flop and the HC bus. Quiescent current is 4 µA — essentially zero when the clock is static. The output drive capability is 5.2 mA source and sink, enough to drive one or two HC inputs directly without a buffer.
This is the full military-temperature grade; the die is characterized across the entire range, not just the commercial 0-70°C window. For a board that sees an engine bay in summer or a cold-storage warehouse, the part stays within spec. The 16-SOIC package has a 1.27 mm pitch and 3.90 mm body width — a standard narrow SOIC footprint. No special land pattern; the part drops into the same pad layout used by the rest of the 74HC SOIC family.