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Texas Instruments CD74HC08M96 — Discrete Semiconductors

CD74HC08M96 Texas Instruments 74HC Quad AND Gate, 14-SOIC

MPNCD74HC08M96
End of Life

Texas Instruments 74HC series quad 2-input AND gate, CD74HC08M96, 14-SOIC (0.154", 3.90mm Width), 2V to 6V supply, -55°C to 125°C, 2 µA quiescent.

$0.46Ref. price · indicative, final on quote
Packaging14-SOIC (0.154", 3.90mm Width)
RoHSROHS3 Compliant
Series74HC
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

CD74HC08M96 specifications
ParameterValue
Series74HC
Logic typeAND Gate
MountingSurface Mount
Supply voltage2V ~ 6V
Current - quiescent2 µA
Current - output high, low5.2mA, 5.2mA
I/O channels2
Operating temperature-55°C ~ 125°C
PackageTape & Reel (TR); Cut Tape (CT)
Case14-SOIC (0.154\", 3.90mm Width)
Number of circuits4
Input logic level - low0.5V ~ 1.8V
Input logic level - high1.5V ~ 4.2V
Max propagation delay @ v, max CL15ns @ 6V, 50pF

Product details

14-SOIC footprint and board integration

The CD74HC08M96 is a quad 2-input AND gate from the 74HC family, housed in a 14-SOIC (0.154", 3.90mm width) surface-mount package. The 1.27 mm pin pitch on the SOIC body is a standard footprint — it routes cleanly on a two-layer board without via congestion under the part. Supply voltage spans 2V to 6V, covering both 3.3V and 5V logic rails common in mixed-voltage designs. The wide range means the same gate can buffer signals between a 3.3V microcontroller and a 5V peripheral without a separate level translator, as long as the input thresholds align. Operating temperature from -55°C to 125°C qualifies it for industrial and automotive under-hood environments — the full military temperature band. The 2 µA max quiescent current keeps the static power draw negligible even in battery-backed or always-on sections of the board.

Output drive and timing for the BOM

Each output sinks or sources 5.2 mA — enough to drive a standard TTL load or a low-power LED indicator directly, but not enough for a relay coil or high-fan-out bus without a buffer. The 15 ns max propagation delay at 6V and 50 pF load sets the ceiling for clock distribution or glitch filtering: at 5V the delay is typically a few nanoseconds slower, so budget 20 ns for timing closure in a 50 MHz path. Input logic levels are specified as 0.5V to 1.8V for low and 1.5V to 4.2V for high across the supply range. At 5V Vcc, the low threshold is about 1.35V and the high threshold about 3.15V — this gives roughly 1.8V of noise margin on both edges, which is comfortable for routing alongside switching regulators or motor drive traces.

Frequently asked questions

What package does CD74HC08M96 come in?

It is supplied in a 14-SOIC (0.154", 3.90mm width) surface-mount package, available in Tape & Reel or Cut Tape options.