Dual JK flip-flop with set/reset — 24 MHz, 3V to 18V, military temp range
It triggers on the positive edge of the clock and provides complementary Q and Q̅ outputs. The wide supply range of 3V to 18V lets it interface directly with 5V, 12V, or 15V logic rails without a level shifter — useful in mixed-voltage industrial control boards or existing 4000-series backplanes.
24 MHz clock — timing margin in a 4000B part
Maximum clock frequency is 24 MHz. Propagation delay is 90 ns at 15 V supply into a 50 pF load.
Quiescent current and output drive
Quiescent current is 4 µA typical — negligible for battery-backed or always-on logic where the flip-flop sits idle between events. Output source and sink are both rated at 6.8 mA, enough to drive a standard CMOS input or a low-power LED indicator, but not enough for a relay coil or a long twisted-pair line without a buffer. Input capacitance is 5 pF, which keeps the clock-line load light when multiple flip-flops share a single oscillator.
The 16-SOIC package (0.154" body width, 3.90 mm) is a standard surface-mount footprint; no special reflow profile is needed beyond the usual lead-free solder curve.
