Single-gate buffer for mixed-voltage and bus isolation
The Texas Instruments 74LVC1G126DBVRE4 is a single-gate, non-inverting buffer with 3-state output from the 74LVC low-voltage CMOS family. The 3-state output allows the device to disconnect from a shared bus, useful in multiplexed I²C, SPI chip-select, or general-purpose enable/disable gating.
Supply range and level-shifting capability
Running the buffer at 3.3 V while the input comes from a 1.8 V peripheral works because the 74LVC family's input thresholds are CMOS-compatible across the full range — no external level shifter needed. This saves board area and BOM cost in mixed-voltage designs like sensor interfaces, FPGA configuration, or legacy 5 V tolerant bus buffering.
The wide temperature range also covers cold-crank and hot-soak conditions in engine-adjacent electronics, though it lacks formal AEC-Q100 qualification in the record — verify against your OEM's specific automotive-grade requirement if that is your target.
Output drive and bus fan-out
Symmetric 32 mA source and sink capability at both high and low output states is unusual for a single-gate logic device. It drives multiple CMOS loads or a short PCB trace without needing a dedicated buffer line driver. In a 3.3 V system, 32 mA translates to roughly a 100 Ω equivalent output impedance — enough to drive a 50 Ω controlled-impedance trace for a few inches, but not a long backplane cable.
Supplied in a 5-pin SOT-23-5 package (also designated SC-74A), the footprint is industry-standard for single-gate logic. The same pad layout is shared across the 74LVC1G family and many competitors' single-gate buffers, simplifying last-minute alternate sourcing on the PCB.
Listed as Active in the lifecycle record — no end-of-life notification, no last-time-buy window. For BOM qualification into new designs, there is no looming obsolescence risk.