01005 footprint and NP0 dielectric
The EMK042CG050CD-W: The 0.40 mm × 0.20 mm body with 0.22 mm seated thickness is the board-fit constraint that drives everything else. Paste volume is tight — the stencil opening should closely match the pad dimensions, and the coplanarity tolerance window is shallower than it is on a 0402 or larger MLCC. Misregistration shifts the solder fillet to the thin side, which is the most common cause of tombstoning on 01005 parts during reflow. C0G/NP0 dielectric means the capacitance holds flat across the full temperature band and across DC bias — there is no voltage coefficient to budget into a timing or filter design. The 5 pF value and the ±0.25 pF tolerance are a precision specification, not a bulk-decoupling one. For a timing-critical node or RF path, the NP0/C0G choice is what makes the value stable — a high-K X7R at 5 pF would be drifting with temperature in a way a C0G part simply does not.