STM32L051T8Y6DTR

STMicroelectronics

STMicroelectronics STM32L0 series, ARM Cortex-M0+ 32-bit MCU, STM32L051T8Y6DTR, 32 MHz, 64 KB Flash, 8K x 8 RAM, 2K x 8 EEPROM, 1.65 V to 3.6 V, 29 I/O, 36-WLCSP, -40°C to 85°C.

STMicroelectronics STM32L051T8Y6DTR
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[IN STOCK] In Stock: 6 pcs
$9.19/ pc

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MOQ 1 · Tape & Reel (TR) Cut Tape (CT) · RoHS · EIA-481 · DAP/DDP · T/T

Technical specifications

STM32L051T8Y6DTR specifications
Parameter / AttributeSpecification / Value
SeriesSTM32L0
MountingSurface Mount
Oscillator typeInternal
Program memory typeFLASH
Voltage - supply (Vcc (Vdd))1.65V ~ 3.6V
Operating temperature-40°C ~ 85°C (TA)
Speed32MHz
PackageTape & Reel (TR) Cut Tape (CT)
RAM size8K x 8
Core size32-Bit Single-Core
EEPROM size2K x 8
PeripheralsBrown-out Detect/Reset, DMA, POR, PWM, WDT
ConnectivityI²C, IrDA, SPI, UART/USART
Number of i (O)29
Core processorARM® Cortex®-M0+
Case36-UFBGA, WLCSP
Data convertersA/D 10x12b
Program memory size64KB (64K x 8)

Technical details

Small-package Cortex-M0+ for battery-duty

WLCSP — small footprint, careful handling

The 36-WLCSP package (also listed as 36-UFBGA) saves board area but is not a field-swap-friendly part. No exposed leads to probe, no socket option — it is a direct-solder-to-board ball-grid array. For the rework lab tech: the balls are under the package, so visual alignment is tricky; you will need X-ray or a well-aligned stencil. On the bright side, the 29 I/O lines are enough for sensor interfaces, small keypads, or control loops in a compact IoT node.

That means ST is still manufacturing it, no last-time-buy notice has been issued, and it remains eligible for new designs. For the BOM cost engineer: this part is single-sourced to ST, so if you need a second source, look at pin-compatible STM32L0 family members with the same WLCSP footprint — but there is no direct cross from another vendor. The active status gives you runway for at least several more years of production availability.

What the 32 MHz core and 64 KB Flash mean for your BOM

At 32 MHz, the Cortex-M0+ core is not a number-cruncher — it is a power-sipping controller for sensor fusion, simple motor commutation, or protocol bridging. The 8 KB SRAM is tight for heavy buffering (e.g., audio or high-rate ADC logging). The 2 KB EEPROM is a nice bonus: you can store calibration or configuration data without wearing the Flash sectors. The 10-channel 12-bit ADC covers multiple analog inputs without an external mux.

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