What this STM32G473CEU6 brings to a mixed-signal control loop
If you are migrating from an STM32L1 or similar Cortex-M3 part at 32 MHz, the G4 gives roughly 5× the arithmetic throughput per cycle, plus the DSP extensions and single-precision FPU that the M3 lacks. That matters when you are unrolling a Park-Clarke transform or a CORDIC in software rather than offloading to an external FPGA.
512 KB of Flash is the mid-density option in the G473 line. It holds a full motor-control stack (STM32 Motor Control SDK, HAL, application code) with room for a bootloader and one or two OTA image slots if you compress. The 128 KB SRAM is split across multiple banks on the G4 architecture, which lets you allocate one bank for DMA ping-pong ADC buffers and another for the real-time control variables without contention. If your application needs more than 128 KB of working memory, step up to the G474 or G491 variants — but for a typical three-shunt motor drive or a 2 kW digital PSU, this is the right tier.
Analog front-end: 21 ADC channels and 4 DAC outputs on a 48-pin package
With 21 analog inputs on a 48-pin package, nearly every available pin can serve as an ADC channel. That is unusual for this pin count — most competitors in a 48-QFN offer 10 to 16 analog inputs. The four 12-bit DACs can simultaneously generate reference voltages, offset trim, or analog setpoints for downstream comparators or external amplifiers. For a three-phase inverter, you can dedicate three DACs to current-reference generation and use the fourth for a DC-link voltage setpoint, all without external components.
48-UFQFN with exposed pad — thermal and layout notes
Without those vias, the junction temperature rises quickly above 400 mA continuous I/O or when running the core and ADC at full speed. The pad is electrically connected to VSS, so it doubles as a low-inductance ground return for the analog and digital supplies. Keep the decoupling capacitors within 3 mm of the supply pins — the UFQFN has no room for a fan-out, so place 100 nF and 4.7 µF on the same layer as the pad.