72 MHz Cortex-M3 with USB OTG and dual CAN — the Connectivity line MCU
The distinguishing feature versus the value-line STM32F103 is the USB OTG peripheral with an on-chip PHY and dual CAN 2.0B interfaces, which saves an external USB controller and a CAN transceiver on the BOM. With 80 I/O lines in a 100-LQFP package, it is sized for industrial gateways, motor drives with fieldbus, and building automation controllers that need to bridge a CAN network to a USB host.
The 256 KB program Flash and 64 KB SRAM define the firmware boundary. A typical application running FreeRTOS, a CANopen stack, and a USB CDC class driver leaves about 80 KB of Flash and 20 KB of RAM free for application code and buffers. The Flash is organized as 256 K x 8 bits with 2 KB and 64 KB erase sectors, which matters when sizing the OTA update staging area.
USB OTG and dual CAN — what the connectivity means on the bus
The STM32F105VCT6 carries a USB OTG full-speed (12 Mbps) peripheral with an integrated PHY — no external USB transceiver needed. The dual CAN 2.0B controllers share a single 512-byte mailbox RAM. In a typical gateway design, one CAN port handles the fieldbus (e.g., CANopen at 250 kbps) while the second CAN port bridges to a secondary bus or a diagnostic tool. The USB OTG can act as a device (virtual COM port) or as a host (flash drive for data logging). Both CAN and USB can run concurrently without stalling the core, provided the DMA controller is configured for the peripheral FIFOs.
Industrial temperature range and 100-LQFP package
The 100-pin LQFP (14 x 14 mm, 0.5 mm pitch) is inspectable and reworkable with standard hot-air tools. No exposed pad — all thermal dissipation goes through the leads.