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STMicroelectronics STL7N6LF3

STL7N6LF3 N-Channel MOSFET, 60 V, 20 A, AEC-Q101

MPNSTL7N6LF3
End of Life

STMicroelectronics STripFET F3 series, STL7N6LF3, N-Channel MOSFET, 60 V Vdss, 20 A Id, 43 mOhm Rds(on) @ 3 A, 10 V, AEC-Q101, PowerFlat 5x6.

$1.55Ref. price · indicative, final on quote
Packaging8-PowerVDFN
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
  • PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.

Specifications

STL7N6LF3 Technical Specifications
ParameterValue
SeriesSTripFET™ F3
FET typeN-Channel
Mounting typeSurface Mount
Drain to source voltage60 V
Drive voltage (Max rds on, min rds on)5V, 10V
Current - continuous drain (Id) @ 25°C20A (Tc)
Power dissipation4.3W (Ta), 52W (Tc)
Operating temperature-55°C ~ 175°C (TJ)
GradeAutomotive
PackageTape & Reel (TR); Cut Tape (CT)
Vgs±20V
TechnologyMOSFET (Metal Oxide)
QualificationAEC-Q101
Case8-PowerVDFN
Vgs(th) (Max) @ id2.5V @ 250µA
Rds on (Max) @ id, vgs43mOhm @ 3A, 10V
Gate charge (Qg) (Max) @ vgs8.7 nC @ 10 V
Input capacitance (Ciss) (Max) @ vds432 pF @ 25 V

Product details

On-resistance, gate charge, and switching budget

The STL7N6LF3: Gate charge is 8.7 nC at 10 V. Input capacitance Ciss is 432 pF at 25 V Vds.

Thermal and package constraints for board layout

Maximum power dissipation is 4.3 W at 25°C ambient and 52 W at 25°C case temperature — the wide gap reflects the thermal resistance improvement from soldering the PowerFlat 5x6 exposed pad to a copper plane.

Frequently asked questions

What is the Rds(on) of STL7N6LF3?

Actual on-resistance increases with junction temperature per the normalised curve in the datasheet — budget approximately 1.6× the 25°C value at 150°C junction.