On-resistance, gate charge, and switching budget
The STL7N6LF3: Gate charge is 8.7 nC at 10 V. Input capacitance Ciss is 432 pF at 25 V Vds.
Thermal and package constraints for board layout
Maximum power dissipation is 4.3 W at 25°C ambient and 52 W at 25°C case temperature — the wide gap reflects the thermal resistance improvement from soldering the PowerFlat 5x6 exposed pad to a copper plane.
