Skip to main content
Log in
STMicroelectronics STFW38N65M5 — Discrete Semiconductors

STFW38N65M5 N-Channel MOSFET, 650 V, 30 A, MDmesh V

MPNSTFW38N65M5
Active

STMicroelectronics STFW38N65M5, MDmesh™ V N-Channel MOSFET, 650 V Vdss, 30 A Id, 95 mOhm Rds(on) @ 15 A, 10 V, 71 nC gate charge, TO-3P-3 Full Pack (TO-3PF), Through Hole, 150°C junction.

$4.5763Ref. price · indicative, final on quote
STMicroelectronics STFW38N65M5 datasheet (PDF)
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

STFW38N65M5 specifications
ParameterValue
SeriesMDmesh™ V
FET typeN-Channel
MountingThrough Hole
Drain to source voltage650 V
Drive voltage (Max rds on, min rds on)10V
Current - continuous drain (Id) @ 25°C30A (Tc)
Power dissipation57W (Tc)
Operating temperature150°C (TJ)
PackageTube
Vgs±25V
TechnologyMOSFET (Metal Oxide)
CaseTO-3P-3 Full Pack
Vgs(th) (Max) @ id5V @ 250µA
Rds on (Max) @ id, vgs95mOhm @ 15A, 10V
Gate charge (Qg) (Max) @ vgs71 nC @ 10 V
Input capacitance (Ciss) (Max) @ vds3000 pF @ 100 V

Product details

650 V N-channel MOSFET for high-efficiency switching

It is designed for hard-switching topologies in power supplies, PFC stages, and lighting ballasts where 650 V blocking voltage and 30 A continuous drain current are required. The TO-3PF full-pack package isolates the back metal, simplifying heatsink attachment without an insulating pad.

Input capacitance of 3000 pF at 100 V Vds is moderate; the driver should source at least 1 A peak to avoid excessive crossover loss during miller-plateau transitions.

Maximum power dissipation is 57 W at case temperature, so a properly sized heatsink with good airflow is necessary for sustained high-current operation.

Frequently asked questions

How does STFW38N65M5 compare to STFW38N60M5?

The STFW38N65M5 is rated for 650 V drain-source voltage, while the STFW38N60M5 is a 600 V device. Both share the same TO-3PF package and MDmesh V technology, but the 650 V rating provides additional voltage margin for designs with transient spikes above 600 V, such as PFC stages in universal-input power supplies.