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STMicroelectronics M95080-DRMN3TP/K — Memory (DRAM / SRAM / Flash / EEPROM)

STMicroelectronics M95080-DRMN3TP/K 8Kbit SPI EEPROM

MPNM95080-DRMN3TP/K
Active

STMicroelectronics Automotive AEC-Q100 M95080-DRMN3TP/K, 8Kbit SPI EEPROM, 20 MHz clock, 1.8V-5.5V supply, -40°C to 125°C, 8-SOIC package.

$0.8700Ref. price · indicative, final on quote
Packaging8-SOIC (0.154", 3.90mm Width)
RoHSROHS3 Compliant
SeriesAutomotive, AEC-Q100
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

M95080-DRMN3TP/K specifications
ParameterValue
SeriesAutomotive, AEC-Q100
Memory typeNon-Volatile
MountingSurface Mount
Voltage1.8V ~ 5.5V
Frequency20 MHz
Memory interfaceSPI
Operating temperature-40°C ~ 125°C (TA)
PackageTape & Reel (TR) Cut Tape (CT)
TechnologyEEPROM
Memory size8Kbit
Memory formatEEPROM
Case8-SOIC (0.154\", 3.90mm Width)
Memory organization1K x 8
Write cycle time - word, page4ms

Product details

Automotive-grade 8-Kbit SPI EEPROM for calibration and configuration storage

It stores non-volatile data such as calibration constants, trim values, or configuration parameters in an 8-pin SOIC package.

20 MHz SPI and 4 ms page write — bus timing and firmware update impact

The 20 MHz SPI clock allows the host controller to read the full 1 K x 8 memory array in under 500 µs, which is fast enough for real-time parameter lookups in an ECU. The 4 ms write cycle time per word or page means a full 8-Kbit firmware update takes roughly 500 ms worst-case — acceptable for OTA staging but not for latency-critical writes. The SPI interface uses standard mode 0/3; no special timing tweaks needed.

Package and supply — 8-SOIC footprint and wide voltage rail

Surface-mount assembly is standard; no special reflow profile beyond the usual lead-free recipe.

Frequently asked questions

Is M95080-DRMN3TP/K AEC-Q100 qualified?

Yes, the M95080-DRMN3TP/K is part of the Automotive, AEC-Q100 series, meaning it has passed automotive-grade qualification tests for reliability under harsh conditions.

How fast is the SPI clock for M95080-DRMN3TP/K?

The SPI clock frequency is 20 MHz, allowing fast read/write access to the 8-Kbit memory array.

How many write cycles does M95080-DRMN3TP/K support?

The evidence does not specify a write-cycle endurance figure for this exact part. Standard automotive EEPROMs in this family typically support 1 million write cycles, but confirm the specific rating from the full datasheet.