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STMicroelectronics M24C32-XDW5TP — Memory (DRAM / SRAM / Flash / EEPROM)

M24C32-XDW5TP EEPROM, 32Kbit I2C 1MHz 8-TSSOP

MPNM24C32-XDW5TP
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STMicroelectronics M24C32-XDW5TP, 32Kbit serial EEPROM, I2C interface, 1 MHz clock frequency, 450 ns access time, 1.6V to 5.5V supply, 8-TSSOP package, -20°C to 85°C operating temperature.

$0.4000Ref. price · indicative, final on quote
Packaging8-TSSOP (0.173", 4.40mm Width)
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

M24C32-XDW5TP specifications
ParameterValue
Memory typeNon-Volatile
MountingSurface Mount
Voltage1.6V ~ 5.5V
Frequency1 MHz
Memory interfaceI²C
Operating temperature-20°C ~ 85°C (TA)
PackageTape & Reel (TR) Cut Tape (CT)
TechnologyEEPROM
Access time450 ns
Memory size32Kbit
Memory formatEEPROM
Case8-TSSOP (0.173\", 4.40mm Width)
Memory organization4K x 8
Write cycle time - word, page5ms

Product details

32Kbit I2C EEPROM in 8-TSSOP — fit for the BOM

The STMicroelectronics M24C32-XDW5TP is a 32Kbit serial EEPROM organized as 4K x 8 bits, communicating over an I2C bus at up to 1 MHz. It stores configuration parameters, calibration data, or small firmware look-up tables in designs that need non-volatile retention without a battery. The 1.6V to 5.5V supply range makes it a single-rail fit for 1.8V, 2.5V, 3.3V, or 5V logic domains — no level translator needed for the I2C lines when the MCU shares the same rail.

Supply range and 3.3V compatibility

The 1.6V minimum supply covers 1.8V logic without a separate regulator. At 3.3V — the most common I2C bus voltage — the part operates comfortably in the middle of its range, so the I2C timing specs (450 ns access, 1 MHz clock) hold without derating. The 5.5V maximum means it can also sit on a legacy 5V bus alongside 5V-tolerant I2C masters.

Temperature grade — indoor and commercial enclosures

For a -40°C cold-start requirement, the M24C32-FDW6TP sibling offers the extended low end while keeping the same 8-TSSOP footprint.

Write cycle timing for firmware updates

A full 32Kbit page-mode write takes about 5 ms per page — budget around 320 ms for a complete device rewrite if you are updating a calibration table at production end-of-line. The I2C interface acknowledges each byte, so the host can poll for ACK to confirm the write completed before sending the next page.

Package and ordering code note

If your pick-and-place line feeds from reels, this is the correct ordering code. For hand-assembly or small-batch prototyping, the tube-packaged variant (M24C32-WDW6TP) shares the same die and footprint.

Frequently asked questions

What is the memory size of M24C32-XDW5TP?

32Kbit, organized as 4K x 8 bits. This is a 4-kilobyte EEPROM.

Does M24C32-XDW5TP replace AT24C32?

The M24C32 family is a functional equivalent to the Microchip AT24C32 — same I2C interface, same 32Kbit density, same 8-pin SOIC/TSSOP footprint. Pin compatibility should be verified against the specific AT24C32 package suffix, but the M24C32 is a common second-source cross in production BOMs.

What is the difference between M24C32 and M24C64?

The M24C64 doubles the density to 64Kbit (8K x 8) while keeping the same I2C interface, 1 MHz clock, 8-TSSOP footprint, and 450 ns access time. The address map shifts — the M24C64 uses one additional address bit internally, so the I2C device address may differ depending on the pin strapping. If your application needs more parameter storage, the M24C64-DFCT6TP/K is a drop-in footprint upgrade.