256 Kbit I²C EEPROM in a 2x3 mm DFN
The STMicroelectronics M24256-DFMC6TG is a 256 Kbit serial EEPROM organized as 32 K x 8 bits, accessed over an I²C bus at up to 1 MHz. The 450 ns access time is the random-read latency from the bus; page writes complete in 5 ms. Housed in an 8-UFDFPN (2x3 mm) package with an exposed pad, it targets space-constrained designs in industrial control, telecom, and sensor modules where non-volatile parameter storage is needed.
450 ns access and 5 ms page write — bus timing on the I²C line
The 450 ns access time is the random-read latency from the I²C bus; at 1 MHz clock, the first data byte appears after the address byte plus this delay. For back-to-back reads, the bus master must respect the minimum time between STOP and START conditions. The 5 ms page-write cycle time is the internal programming window — the part does not acknowledge further I²C commands during that interval. Firmware should poll for ACK or insert a 5 ms delay after each page write before attempting the next transfer.
The M24256-DFMC6TG is an active part with no end-of-life notice. It is ROHS3 compliant.