PSRR and noise rejection for analog rails
The LDK320M33R delivers 88 dB PSRR at 120 Hz, tapering to 48 dB at 10 kHz. That 88 dB floor at line frequency means the regulator attenuates 120 Hz ripple from a rectified supply by a factor of roughly 25,000 — critical when powering a sensitive ADC reference or a VCO that would otherwise phase-modulate the ripple onto the carrier. The 48 dB at 10 kHz still provides 250× rejection of switching noise from a downstream buck converter.
Dropout and headroom budget
Maximum dropout is 0.35 V at the full 200 mA load. That sets the minimum input-to-output differential: a 3.3 V rail needs at least 3.65 V at the input pin under worst-case load and temperature.
Quiescent current and always-on suitability
Quiescent current is 90 µA typical, with a maximum supply current of 100 µA. For a battery-backed real-time clock or a microcontroller in sleep mode drawing a few microamps, the regulator's own consumption dominates the idle budget — 90 µA is modest for a 200 mA-capable LDO but not ultra-low-power. The enable pin lets a system-level power switch disconnect the load entirely, dropping the total draw to near zero when the rail is unused.
Thermal range and protection
The SOT-23-5 package (SC-74A footprint) has a junction-to-ambient thermal resistance around 250°C/W on a standard two-layer board — at 200 mA with 0.35 V dropout, the power dissipation is 70 mW, keeping the junction rise under 18°C even at 125°C ambient. Over-current and over-temperature protection are built in; the part folds back or shuts down before the silicon exceeds its safe operating area.
ROHS3 compliant per the manufacturer's declaration.
