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STMicroelectronics LD56020J110R — Power Management (PMIC / Gate Driver)

STMicroelectronics LD56020J110R LDO, 200mA, 1.1V Fixed

MPNLD56020J110R
End of Life

STMicroelectronics LD56020J110R LDO, 200 mA output, 1.1 V fixed, 4-XFBGA package, 90 dB ~ 55 dB PSRR (100 Hz ~ 100 kHz), 25 µA quiescent current.

$0.6Ref. price · indicative, final on quote
Packaging4-XFBGA
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

LD56020J110R specifications
ParameterValue
Output typeFixed
MountingSurface Mount
Voltage - input5.5V
Voltage - output (Min (Fixed))1.1V
Output current200mA
Current - quiescent25 µA
Operating temperature-40°C ~ 125°C (TJ)
PSRR90dB ~ 55dB (100Hz ~ 100kHz)
PackageTape & Reel (TR); Cut Tape (CT)
Case4-XFBGA
Control featuresEnable
Protection featuresOver Temperature, Short Circuit
Number of regulators1
Output configurationPositive

Product details

200 mA LDO in a 0.69 mm flip-chip package

The STMicroelectronics LD56020J110R is a 200 mA low-dropout linear regulator with a fixed 1.1 V output, packaged in a 4-XFBGA (4-FlipChip) measuring just 0.69x0.69 mm. This footprint is designed for space-constrained portable and battery-powered equipment where board real estate is the primary constraint — the die sits directly on the PCB with no leadframe overhead. Input voltage range extends to 5.5 V, making it suitable for single-cell Li-Ion or 3.3 V/5 V rails, while the 25 µA quiescent current keeps the regulator's own draw well below the self-discharge rate of a typical 100 mAh coin cell in always-on sensor nodes.

PSRR across the frequency band — what 90 dB to 55 dB means for noise-sensitive rails

The LD56020J110R delivers 90 dB of power-supply rejection at 100 Hz, tapering to 55 dB at 100 kHz. This is the critical band for switching-regulator ripple (typically 100 kHz to 1 MHz fundamental) and 50/60 Hz mains hum. At 100 kHz, the 55 dB rejection means that a 10 mVpp ripple on the input rail is attenuated to roughly 18 µVpp at the output — clean enough to feed an analog front-end or RF oscillator without additional post-filtering.

Thermal and protection envelope

At 125°C junction, the silicon's leakage current rises — but the 25 µA quiescent spec is measured at 25°C; expect it to roughly double at 85°C and quadruple at 125°C, still manageable for a 200 mA output stage. Built-in over-temperature and short-circuit protection shut down the regulator before the die exceeds its abs-max rating. The enable pin allows the system to gate the output rail, dropping Iq to near-zero in sleep mode.

The 4-XFBGA package (0.69x0.69 mm) has four bumps — input, output, ground, and enable. A solid ground plane under the package with at least two thermal vias to an inner-layer copper pour is recommended to keep RthJA below 150°C/W for full 200 mA output at high ambient.

Frequently asked questions

What is the PSRR of the LD56020J110R across frequency?

The LD56020J110R provides 90 dB PSRR at 100 Hz, decreasing to 55 dB at 100 kHz. This covers the full spectrum of common switching-regulator ripple and mains hum.

Will the LD56020J110R drop into a board designed for the LD39015M10R?

No — the LD56020J110R uses a 4-XFBGA (0.69x0.69 mm) flip-chip package, while the LD39015M10R uses a different package. They are not pin-compatible, and a board spin would be required. The LD56020J110R also offers higher output current (200 mA vs 150 mA) and wider PSRR bandwidth.