Renesas 9ZXL0831AKLFT PLL clock buffer, 1:8 HCSL outputs, 147 MHz max, 3.135-3.465 V supply, 48-VFQFPN, tape and reel.
| Parameter | Value |
|---|---|
| Mounting | Surface Mount |
| Supply voltage | 3.135V ~ 3.465V |
| Frequency - max | 147MHz |
| Operating temperature | 0°C ~ 70°C |
| PLL | Yes |
| Input | Clock |
| Output | HCSL |
| Package | Tape & Reel (TR); Cut Tape (CT) |
| Main purpose | Intel QPI, PCI Express (PCIe) |
| Case | 48-VFQFN Exposed Pad |
| Number of circuits | 1 |
| Ratio - Input:Output | 1:8 |
| Differential - Input:Output | Yes/Yes |
The 9ZXL0831AKLFT is a PLL-based zero-delay clock buffer that takes one differential clock input and fans it out to eight HCSL outputs, purpose-built for Intel QPI and PCI Express (PCIe) reference clock trees.
Supplied on tape and reel or cut tape — the reel quantity is the usual procurement path for volume builds, but cut tape works for prototype or repair runs.
The maximum output frequency is 147 MHz.
The outputs are HCSL (High-Speed Current Steering Logic), differential.
The part is listed for PCI Express (PCIe) main purpose and runs at 147 MHz max — PCIe Gen4 uses a 100 MHz reference clock, so the frequency is adequate, but the jitter and phase noise specs would need to be verified against the Gen4 standard; the evidence does not state Gen4 explicitly.
No stock-holding claim; submit an RFQ for your BOM quantity.