PLL clock buffer for PCIe and QPI — 1:6 HCSL fanout
The Renesas 9ZXL0651AKLF is a PLL-based clock buffer that takes a single differential clock input and fans it out to six HCSL outputs, purpose-built for Intel QPI and PCI Express (PCIe) reference clock trees. It operates from a 3.135V to 3.465V supply and is housed in a 40-VFQFPN (5x5) package rated for 0°C to 70°C commercial temperature range.
1:6 ratio — what it means for the clock tree
With a 1:6 input-to-output ratio, this buffer drives up to six downstream devices — PCIe root complexes, switches, or QPI links — from a single reference clock. The differential input and HCSL output path (both differential) preserves signal integrity across the fanout, critical for keeping jitter within PCIe Gen3/Gen4 budgets.
Active and ROHS3 — no lifecycle surprises
The 9ZXL0651AKLF carries an Active product status with ROHS3 compliance.