Fanout and output flexibility
The 1:4 ratio lets a single reference clock source drive up to four PCIe slots, root complexes, or switch endpoints without an external fanout tree. Outputs are individually selectable between HCSL and LVDS, which simplifies BOM consolidation when mixing PCIe and non-PCIe differential receivers on the same board. The differential input and all outputs are fully differential (Yes/Yes), so no single-ended termination is needed on the clock lanes.
Lifecycle and compliance
It is ROHS3 compliant, so it meets the EU RoHS exemption-free requirements for lead-free assembly.
