A 1.5 ns propagation delay puts this latch in the fast-CMOS tier.
24 mA symmetric drive — fan-out and signal integrity
The 24 mA output drive (both high and low) is enough to buffer eight standard LSTTL loads or four 74F-series loads per output without external buffers. On a heavily loaded backplane or memory-data bus, that symmetry simplifies derating — the pull-up and pull-down edges match, so you don't have to oversize the high-side drive to compensate for a weak pull-up. The tri-state outputs also allow multiple latches to share a bus without contention, as long as the output-enable timing is sequenced.
The 48-SSOP package (0.295-inch body width, 7.50 mm) is a standard fine-pitch footprint.
No official second-source alternate is listed in the manufacturer records, but the 74FCT162373 family includes multiple speed and package variants that share the same footprint and function.