PLL clock generator for PCIe and Ethernet reference timing
The Renesas 5V41065PGG is a single-circuit PLL-based clock generator that accepts a crystal or single-ended clock input and delivers two differential outputs in HCSL or LVDS format. It is designed specifically for Ethernet and PCI Express (PCIe) reference clock generation, with a maximum output frequency of 200 MHz. The 1:2 input-to-output ratio means one reference source fans out to two clock lanes, which suits point-to-point links in a switch or line card where each PHY gets its own clean clock tree. Operating over the commercial temperature range of 0°C to 70°C, this part is intended for indoor, controlled-environment equipment such as network switches, routers, and server motherboards — not for industrial or outdoor deployment.
200 MHz ceiling and PCIe generation fit
The differential output (HCSL or LVDS) matches the input requirements of PCIe PHYs and Ethernet SerDes, but the single-ended input means the reference source must be clean — a crystal oscillator or a low-jitter clock module is recommended.
Lifecycle and compliance
It is ROHS3 compliant, which covers the current EU RoHS exemption list.
Package and mounting
Supplied in a 16-lead TSSOP package (4.40 mm body width) for surface-mount assembly.