MIMX8MM1CVTKZAA

NXP USA Inc. · i.MX8MM Series

NXP i.MX8MM series, MIMX8MM1CVTKZAA single-core ARM Cortex-A53 MPU at 1.6GHz, 486-LFBGA (14×14mm) surface-mount, -40°C to 105°C junction, GbE, dual USB 2.0, MIPI-DSI display, ARM Cortex-M4 co-processor, DDR3L/DDR4/LPDDR4, PCIe/SPI/UART/SDHC/I²C, ARM TZ/HAB secure boot, ROHS3.

NXP USA Inc. MIMX8MM1CVTKZAA
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MOQ 1 · Tray · RoHS · EIA-481 · DAP/DDP · T/T

Technical specifications

MIMX8MM1CVTKZAA specifications
Parameter / AttributeSpecification / Value
Seriesi.MX8MM
MountingSurface Mount
Additional interfacesI²C, PCIe, SDHC, SPI, UART
Display & interface controllersMIPI-DSI
Operating temperature-40°C ~ 105°C (TJ)
Number of cores (Bus width)1 Core, 64-Bit
USBUSB 2.0 + PHY (2)
Speed1.6GHz
PackageTray
EthernetGbE
Core processorARM® Cortex®-A53
Case486-LFBGA, FCBGA
RAM controllersDDR3L, DDR4, LPDDR4
Co-Processors (DSP)ARM® Cortex®-M4
Security featuresARM TZ, CAAM, HAB, OCRAM, RDC, SJC, SNVS
Graphics accelerationYes

Technical details

The MIMX8MM1CVTKZAA: Single-core ARM Cortex-A53 MPU clocked at 1.6 GHz, paired with an ARM Cortex-M4 co-processor. Integrates GbE MAC, dual USB 2.0 with PHY, MIPI-DSI display controller, and memory support for DDR3L, DDR4, or LPDDR4.

One Cortex-A53 core at 1.6 GHz. The Cortex-M4 offloads deterministic I/O so the A53 runs the application stack without interrupt jitter.

Memory controller flexibility

Memory controller supports DDR3L, DDR4, and LPDDR4 without a board respin. The 486-LFBGA footprint accepts any of these memory types.

Security and co-processor architecture

Hardware security via ARM TrustZone, CAAM, HAB, and on-chip OCRAM. The Cortex-M4 runs a separate RTOS for time-critical loops while the A53 handles Linux-based UI and networking.

MIMX8MM1CVTKZAA
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