72 MHz core — timing margin for LCD frame refresh and Ethernet throughput
The 72 MHz ARM7 core handles LCD frame refresh and Ethernet packet processing. The DMA controller offloads data transfers between peripherals and memory.
512 KB Flash and 96 KB RAM — firmware and buffer budget
512 KB of Flash and 96 KB of SRAM are on-chip. The external memory interface supports SDRAM, SRAM, and Flash expansion.
