USB 2.0 transceiver with 1.8V core supply
The USB3319C-CP-TR is a USB 2.0 transceiver from Microchip's flexPWR™ series, designed to bridge a 1.62V–1.98V core logic domain to the USB bus. It sits in the signal path between a low-voltage SoC or FPGA and the USB connector, handling the level translation and line-state negotiation for full-speed and high-speed signalling. The 1.62V–1.98V supply range means this part runs directly off a 1.8V rail without an external LDO — useful when the main processor already uses that voltage.
The pad must be connected to ground (GND) and stitched with vias to the inner-layer plane — skipping that step raises the junction temperature above the 85°C limit in a warm enclosure. The supply voltage tolerance is tight: 1.62V minimum, 1.98V maximum. A 1.8V rail with ±5% regulation stays inside that window, but a rail that droops below 1.62V during USB resume or high-current bursts will cause the transceiver to lose lock. Budget the IR drop from the regulator to the QFN pad.