Active 1 Mbit SPI NOR flash for code shadowing and parameter storage
The SST25VF010A-33-4C-SAE-T is a 1 Mbit SPI NOR flash from Microchip's SST25 family, organized as 128K x 8 bits.
SPI interface, 33 MHz clock, and the 20 µs page write cycle
The SPI interface uses the standard 4-wire bus (SCK, SI, SO, CS#) common to most MCU SPI peripherals. At 33 MHz, a 256-byte page reads in roughly 8 µs — fast enough for code shadowing from flash to RAM on power-up without stalling the core. Page write cycle time is 20 µs typical. That is the time the internal charge pump needs to program one page after the data is clocked in. For a firmware update writing 64 KB, the total program time is dominated by the page-write cycles, not the SPI clock. A 3.3 V LDO with ±5% regulation stays inside this window even under load.
8-SOIC narrow body — footprint and reflow compatibility
The land pattern matches the standard JEDEC MO-012 variant for narrow SOIC — no custom footprint needed. The supplier device package is 8-SOIC, confirming the same mechanical outline.
This is the commercial temperature band — suitable for indoor equipment, office peripherals, and consumer electronics. Not qualified for automotive or extended industrial environments where -40°C to +85°C is typical. RoHS3 compliant — no restricted substances above the threshold limits. The part carries no halogen or lead restrictions for EU or UKCA markets.
