Non-differential, single-ended routing
The PL123-05NSC-R: Both input and output are single-ended CMOS — no differential pair, no CML or LVDS translation. The 1:5 ratio is a straight fanout; the part does not divide or multiply the clock. If your design needs a clean copy of a 50 MHz or 100 MHz reference for five loads, this is a direct fit. The 8-SOIC package (3.90 mm width) routes easily on a two-layer board.