Quad 8-bit DAC with non-volatile trim storage
The MCP48FEB04T-20E/ST integrates four 8-bit digital-to-analog converters with on-chip EEPROM, allowing per-channel output settings to be stored and recalled at power-up without host intervention. Each DAC uses an R-2R resistor ladder architecture and delivers an unbuffered voltage output, settling to within 1 LSB in 7.8 µs typical — fast enough for closed-loop trim or bias adjustments in automotive control loops. The SPI data interface (mode 0,0 or 1,1) accepts write commands to update the DAC registers or the internal EEPROM; the device supports daisy-chaining for multi-channel systems.
Automotive temperature grade and supply range
Integral non-linearity is ±0.1 LSB maximum, differential non-linearity ±0.0125 LSB — monotonicity is guaranteed over the full temperature range, critical for servo trim loops where a non-monotonic step would cause oscillation.
Package, footprint, and sourcing posture
Supplied in a 20-lead TSSOP (4.40 mm body width) on tape and reel; the same footprint serves the entire MCP48FEB0x family, simplifying BOM consolidation across resolution variants.