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Microchip Technology MCP4141-103E/P — Discrete Semiconductors

Microchip MCP4141-103E/P Digital Pot, 10kΩ, 129 Taps, DIP-8

MPNMCP4141-103E/P
End of Life

Microchip Technology WiperLock™ MCP4141-103E/P digital potentiometer, 10kΩ linear taper, 129 taps, SPI interface, non-volatile memory, 8-DIP through-hole package, -40°C to +125°C.

$1.17Ref. price · indicative, final on quote
Packaging8-DIP (0.300", 7.62mm)
RoHSROHS3 Compliant
SeriesWiperLock™
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

MCP4141-103E/P specifications
ParameterValue
SeriesWiperLock™
Memory typeNon-Volatile
MountingThrough Hole
Supply voltage1.8V ~ 5.5V
InterfaceSPI
Operating temperature-40°C ~ 125°C
TaperLinear
PackageTube
Tolerance±20%
ConfigurationPotentiometer
Number of taps129
Case8-DIP (0.300\", 7.62mm)
Resistance10k
Number of circuits1
Temperature coefficient150ppm/°C
Resistance - wiper (Ohms)75

Product details

WiperLock™ digital pot for set-and-forget calibration

The MCP4141-103E/P is a single-channel digital potentiometer from Microchip's WiperLock™ series, offering 129 wiper taps across a 10 kΩ resistive element with a linear taper. The non-volatile memory stores the wiper position at power-off, so the calibration value is present on the next power-up — no host reload required after a brownout or reset cycle. This makes it a fit for bias trimming, offset nulling, or volume control in systems where the microcontroller is not always running.

SPI control and 129-tap resolution

The SPI interface writes the wiper register directly — no up/down counter, no pulse-train timing to manage. With 129 taps, the step size on a 10 kΩ part is roughly 78 Ω per tap, giving finer granularity than a 64-tap device for the same resistance range. The wiper resistance is 75 Ω typical, which adds a fixed series offset at the wiper terminal; account for this when the wiper drives a low-impedance load directly.

Through-hole DIP-8 for prototyping and low-volume production

The 8-pin PDIP package is a through-hole footprint that fits standard 0.300-inch-wide sockets. For a bench prototype or a low-volume board that avoids SMT assembly, this package is straightforward to hand-solder and rework. The tolerance is ±20%, which is typical for semiconductor pots — the end-to-end resistance can vary from 8 kΩ to 12 kΩ, but the ratiometric divider accuracy (tap-to-end) is much tighter because it depends on the internal resistor matching, not the absolute value.

Sourcing posture

The active lifecycle means there is no supply discontinuity risk from an imminent EOL, and the standard PDIP package has broad second-source compatibility for socket-fit alternatives.

Frequently asked questions

What is the closest peer to MCP4141-103E/P, and how do they differ?

The closest functional peer is the MCP41010-E/P, which is also a 10 kΩ linear-taper digital pot in a DIP-8 package with an SPI interface. The key difference is memory type: the MCP41010 uses volatile memory (wiper position resets to mid-scale on power-up), while the MCP4141 uses non-volatile WiperLock™ memory that retains the last wiper setting. The MCP41010 also offers 256 taps vs the MCP4141's 129 taps. If the application requires the wiper to power up at a known value without host intervention, the MCP4141 is the correct choice; if the host always re-initializes the pot on boot, the MCP4101